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Platarmboardfvpfvp Bl1 Setupcvsplatarmboardfvp Rfvp R Bl1 Setupc
Updated 82 Days AgoPublic

/*                                                            /*
 * Copyright (c) 2013-2020, ARM Limited and Contributors.  |   * Copyright (c) 2013-2021, ARM Limited and Contributors. 
 *                                                             *
 * SPDX-License-Identifier: BSD-3-Clause                       * SPDX-License-Identifier: BSD-3-Clause
 */                                                            */

#include <assert.h>                                           #include <assert.h>

                                                           >  #include <platform_def.h>
                                                           >
#include <bl1/bl1.h>                                          #include <bl1/bl1.h>
#include <common/tbbr/tbbr_img_def.h>                         #include <common/tbbr/tbbr_img_def.h>
#include <drivers/arm/smmu_v3.h>                           <
#include <drivers/arm/sp805.h>                                #include <drivers/arm/sp805.h>
                                                           >  #include <lib/fconf/fconf.h>
                                                           >  #include <lib/fconf/fconf_dyn_cfg_getter.h>
#include <plat/arm/common/arm_config.h>                       #include <plat/arm/common/arm_config.h>
                                                           >
                                                           >  #include "../../../../lib/xlat_mpu/xlat_mpu.h"
                                                           >
#include <plat/arm/common/plat_arm.h>                         #include <plat/arm/common/plat_arm.h>
#include <plat/arm/common/arm_def.h>                          #include <plat/arm/common/arm_def.h>
#include <plat/common/platform.h>                             #include <plat/common/platform.h>
#include "fvp_private.h"                                   |  #include "fvp_r_private.h"
                                                           >
                                                           >  /* Data structure which holds the extents of the trusted S
                                                           >  static meminfo_t bl1_tzram_layout;
                                                           >
                                                           >  struct meminfo *bl1_plat_sec_mem_layout(void)
                                                           >  {
                                                           >          return &bl1_tzram_layout;
                                                           >  }
                                                           >
                                                           >  void arm_bl1_early_platform_setup(void)
                                                           >  {
                                                           >
                                                           >  #if !ARM_DISABLE_TRUSTED_WDOG
                                                           >          /* Enable watchdog */
                                                           >          plat_arm_secure_wdt_start();
                                                           >  #endif
                                                           >
                                                           >          /* Initialize the console to provide early debug s
                                                           >          arm_console_boot_init();
                                                           >
                                                           >          /* Allow BL1 to see the whole Trusted RAM */
                                                           >          bl1_tzram_layout.total_base = ARM_BL_RAM_BASE;
                                                           >          bl1_tzram_layout.total_size = ARM_BL_RAM_SIZE;
                                                           >  }
                                                           >
                                                           >  /* Boolean variable to hold condition whether firmware upd
                                                           >  static bool is_fwu_needed;

/*********************************************************    /*********************************************************
 * Perform any BL1 specific platform actions.                  * Perform any BL1 specific platform actions.
 *********************************************************     *********************************************************
void bl1_early_platform_setup(void)                           void bl1_early_platform_setup(void)
{                                                             {
        arm_bl1_early_platform_setup();                               arm_bl1_early_platform_setup();

        /* Initialize the platform config for future decis            /* Initialize the platform config for future decis
        fvp_config_setup();                                           fvp_config_setup();

        /*                                                            /*
         * Initialize Interconnect for this cluster during             * Initialize Interconnect for this cluster during
         * No need for locks as no other CPU is active.                * No need for locks as no other CPU is active.
         */                                                            */
        fvp_interconnect_init();                                      fvp_interconnect_init();
        /*                                                            /*
         * Enable coherency in Interconnect for the primar             * Enable coherency in Interconnect for the primar
         */                                                            */
        fvp_interconnect_enable();                                    fvp_interconnect_enable();
}                                                             }

                                                           >  void arm_bl1_plat_arch_setup(void)
                                                           >  {
                                                           >  #if USE_COHERENT_MEM && !ARM_CRYPTOCELL_INTEG
                                                           >          /*
                                                           >           * Ensure ARM platforms don't use coherent memory 
                                                           >           * cryptocell integration is enabled.
                                                           >           */
                                                           >          assert((BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE
                                                           >  #endif
                                                           >
                                                           >          const mmap_region_t bl_regions[] = {
                                                           >                  MAP_BL1_TOTAL,
                                                           >                  MAP_BL1_RO,
                                                           >  #if USE_ROMLIB
                                                           >                  ARM_MAP_ROMLIB_CODE,
                                                           >                  ARM_MAP_ROMLIB_DATA,
                                                           >  #endif
                                                           >  #if ARM_CRYPTOCELL_INTEG
                                                           >                  ARM_MAP_BL_COHERENT_RAM,
                                                           >  #endif
                                                           >                  /* DRAM1_region: */
                                                           >                  MAP_REGION_FLAT(                          
                                                           >                          PLAT_ARM_DRAM1_BASE,              
                                                           >                          PLAT_ARM_DRAM1_SIZE,              
                                                           >                            MT_MEMORY | MT_SECURE | MT_EXECU
                                                           >                          | MT_RW | MT_NON_CACHEABLE),
                                                           >                  /* NULL terminator: */
                                                           >                  {0}
                                                           >          };
                                                           >
                                                           >          setup_page_tables(bl_regions, plat_arm_get_mmap())
                                                           >  #ifdef __aarch64__
                                                           >          enable_mpu_el2(0);
                                                           >  #else
                                                           >          enable_mpu_svc_mon(0);
                                                           >  #endif /* __aarch64__ */
                                                           >
                                                           >          arm_setup_romlib();
                                                           >  }
                                                           >
void plat_arm_secure_wdt_start(void)                          void plat_arm_secure_wdt_start(void)
{                                                             {
        sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL            sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL
}                                                             }

void plat_arm_secure_wdt_stop(void)                           void plat_arm_secure_wdt_stop(void)
{                                                             {
        sp805_stop(ARM_SP805_TWDG_BASE);                              sp805_stop(ARM_SP805_TWDG_BASE);
}                                                             }

void bl1_platform_setup(void)                                 void bl1_platform_setup(void)
{                                                             {
        arm_bl1_platform_setup();                                     arm_bl1_platform_setup();

        /* Initialize System level generic or SP804 timer             /* Initialize System level generic or SP804 timer 
        fvp_timer_init();                                             fvp_timer_init();
                                                           <
        /* On FVP RevC, initialize SMMUv3 */               <
        if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) <
                smmuv3_security_init(PLAT_FVP_SMMUV3_BASE) <
}                                                             }

__dead2 void bl1_plat_fwu_done(void *client_cookie, void *    __dead2 void bl1_plat_fwu_done(void *client_cookie, void *
{                                                             {
        /* Setup the watchdog to reset the system as soon             /* Setup the watchdog to reset the system as soon 
        sp805_refresh(ARM_SP805_TWDG_BASE, 1U);                       sp805_refresh(ARM_SP805_TWDG_BASE, 1U);

        while (true)                                       |          while (true) {
                wfi();                                                        wfi();
                                                           >          }
                                                           >  }
                                                           >
                                                           >  unsigned int bl1_plat_get_next_image_id(void)
                                                           >  {
                                                           >          return  is_fwu_needed ? NS_BL1U_IMAGE_ID : BL33_IM
}                                                             }

#if MEASURED_BOOT                                          <
/*                                                            /*
 * Calculates and writes BL2 hash data to TB_FW_CONFIG DTB |   * Returns BL33 image details.
 */                                                            */
void bl1_plat_set_bl2_hash(const image_desc_t *image_desc) |  struct image_desc *bl1_plat_get_image_desc(unsigned int im
{                                                             {
        arm_bl1_set_bl2_hash(image_desc);                  |          static image_desc_t bl33_img_desc = BL33_IMAGE_DES
                                                           >          return &bl33_img_desc;
}                                                             }

/*                                                            /*
 * Implementation for bl1_plat_handle_post_image_load(). T |   * This function populates the default arguments to BL33.
 * populates the default arguments to BL2. The BL2 memory  |   * The BL33 memory layout structure is allocated and the
 * is allocated and the calculated layout is populated in  |   * calculated layout is populated in arg1 to BL33.
 */                                                            */
int bl1_plat_handle_post_image_load(unsigned int image_id)    int bl1_plat_handle_post_image_load(unsigned int image_id)
{                                                             {
        meminfo_t *bl2_tzram_layout;                       |          meminfo_t *bl33_secram_layout;
        meminfo_t *bl1_tzram_layout;                       |          meminfo_t *bl1_secram_layout;
        image_desc_t *image_desc;                                     image_desc_t *image_desc;
        entry_point_info_t *ep_info;                                  entry_point_info_t *ep_info;

        if (image_id != BL2_IMAGE_ID) {                    |          if (image_id != BL33_IMAGE_ID)
                return 0;                                                     return 0;
        }                                                  <

        /* Get the image descriptor */                                /* Get the image descriptor */
        image_desc = bl1_plat_get_image_desc(BL2_IMAGE_ID) |          image_desc = bl1_plat_get_image_desc(BL33_IMAGE_ID
        assert(image_desc != NULL);                                   assert(image_desc != NULL);

        /* Calculate BL2 hash and set it in TB_FW_CONFIG * <
        bl1_plat_set_bl2_hash(image_desc);                 <
                                                           <
        /* Get the entry point info */                                /* Get the entry point info */
        ep_info = &image_desc->ep_info;                               ep_info = &image_desc->ep_info;

        /* Find out how much free trusted ram remains afte            /* Find out how much free trusted ram remains afte
        bl1_tzram_layout = bl1_plat_sec_mem_layout();      |          bl1_secram_layout = bl1_plat_sec_mem_layout();

        /*                                                            /*
         * Create a new layout of memory for BL2 as seen b |           * Create a new layout of memory for BL33 as seen 
         * tell it the amount of total and free memory ava             * tell it the amount of total and free memory ava
         * This layout is created at the first free addres             * This layout is created at the first free addres
         * to BL2. BL2 will read the memory layout before  |           * to BL33. BL33 will read the memory layout befor
         * memory for other purposes.                                  * memory for other purposes.
         */                                                            */
        bl2_tzram_layout = (meminfo_t *)bl1_tzram_layout-> |          bl33_secram_layout = (meminfo_t *) bl1_secram_layo

        bl1_calc_bl2_mem_layout(bl1_tzram_layout, bl2_tzra |          bl1_calc_bl2_mem_layout(bl1_secram_layout, bl33_se

        ep_info->args.arg1 = (uintptr_t)bl2_tzram_layout;  |          ep_info->args.arg1 = (uintptr_t)bl33_secram_layout

        VERBOSE("BL1: BL2 memory layout address = %p\n",   |          VERBOSE("BL1: BL3 memory layout address = %p\n",
                (void *)bl2_tzram_layout);                 |                  (void *) bl33_secram_layout);
        return 0;                                                     return 0;
}                                                             }
#endif /* MEASURED_BOOT */                                 <
Last Author
garymorrison-arm
Last Edited
Jul 2 2021, 10:45 PM