16550 UART does not round up divisor
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Description

From the generic 16550 UART initialization code (drivers/ti/uart/aarch64/16550_console.S):

	/* -----------------------------------------------
[...]
	 * In: x0 - console base address
	 *     w1 - Uart clock in Hz
	 *     w2 - Baud rate
[...]
	/* Program the baudrate */
	/* Divisor =  Uart clock / (16 * baudrate) */
	lsl	w2, w2, #4
	udiv	w2, w1, w2
	and	w1, w2, #0xff		/* w1 = DLL */
	lsr	w2, w2, #8
	and	w2, w2, #0xff		/* w2 = DLLM */

I think it would be better if the division result is rounded so that we get a better actual clock rate if the uart clock doesn't divide into the baud rate very well (eg by adding add w1, w1, w2, LSR #1 just before the udiv) . This is what all of Linux, U-Boot and EDK2 do:

jcowgill created this task.Aug 6 2019, 11:14 AM