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Support Arm SMMU
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Hafnium currently has an IOMMU driver model but no public implementations. We should include an implementation for the standard Arm SMMUv2 (or maybe another version?) on some reference hardware.

TODO: Can we paravirtualize the access to shared Status Control Registers (SMMU)? Or do we need to virtualize the register access (we don’t like this)?

(Migrated from b/132422316.)

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qwandor created this task.Apr 27 2020, 4:08 PM

what about SMMUV3.x ?

@odeprez / Arm might be able to comment on this.


We're considering the SMMUv3.2 support which covers the Secure Stage-2 mappings (
This is still in initial investigation phases, but we hope to share design details and early patches by end of Q4'20.


Thanks for your reply, so there is Stage-2 SMMU support, right? And i think we can support passthrough io support in Secure-EL1 with Stage-2 SMMU


SMMUv3.2 supports secure Stage-2 translations and that's the feature we intend to enable as a first step.
The IP also supports "nested translations" aka S-EL1 SMMU paravirtualization although we're not looking at this option immediately.