Hafnium currently has an IOMMU driver model but no public implementations. We should include an implementation for the standard Arm SMMUv2 (or maybe another version?) on some reference hardware.
TODO: Can we paravirtualize the access to shared Status Control Registers (SMMU)? Or do we need to virtualize the register access (we don’t like this)?
(Migrated from b/132422316.)
Hi,
We're considering the SMMUv3.2 support which covers the Secure Stage-2 mappings (https://developer.arm.com/documentation/ihi0070/latest).
This is still in initial investigation phases, but we hope to share design details and early patches by end of Q4'20.
Regards,
Olivier.
Thanks for your reply, so there is Stage-2 SMMU support, right? And i think we can support passthrough io support in Secure-EL1 with Stage-2 SMMU
Hi,
SMMUv3.2 supports secure Stage-2 translations and that's the feature we intend to enable as a first step.
The IP also supports "nested translations" aka S-EL1 SMMU paravirtualization although we're not looking at this option immediately.
Regards,
Olivier.
Enabling and utilizing ARM SMMU features can be quite hardware-specific and may require understanding the specific undertale implementation and documentation provided by the hardware manufacturer.