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Enable cache and MRAM fast-read on MUSCA S1
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This task is created to enable the cache and MRAM fast-read function on Musca S1.

Both instruction cache and the Serial Configuration Control (SCC - controlling fast-read function) are configured to be secure. The ioctl services are extended to
allow access to some SCC functions from the non-secure code.

Event Timeline

gbrtth created this task.Jul 22 2020, 2:01 PM

Attaching the test logs running the regression configurations:

gbrtth closed this task as Resolved.Sep 9 2020, 5:09 PM

The patches are merged.