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[Question] Could CASSERT check PSCI_MAX_PWR_LVL be removed?
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We want to increase the max power level. When we configure PLAT_MAX_PWR_LVL more than 3, the CASSERT block the build:

 * The maximum power level supported by PSCI. Since PSCI CPU_SUSPEND
 * uses the old power_state parameter format which has 2 bits to specify the
 * power level, this constant is defined to be 3.
#define PSCI_MAX_PWR_LVL    U(3)
 * Check that the maximum power level supported by the platform makes sense

Could this assertion be removed? We test PLAT_MAX_PWR_LVL more than 3 with CASSERT removed, the result is quite expected.

Please share your opinion, thank you.

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