Hello,
I am trying to configure an interrupt for Group 1 Secure, so that it is routed to OP-TEE OS. In the file `drivers/arm/gic/v3/gicv3_main.c` I located the function `void gicv3_driver_init(const gicv3_driver_data_t *plat_driver_data)` which I have verified is being called during boot. Is my understanding correct that I can configure an interrupt as Secure Group 1 if I add an entry to this `gic3v_driver_data_t`? The NXP code instantiates the `gicv3_driver_data_t` structure like so:
```
static const interrupt_prop_t g01s_interrupt_props[] = {
INTR_PROP_DESC(6, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S, GIC_INTR_CFG_LEVEL),
INTR_PROP_DESC(7, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP0, GIC_INTR_CFG_LEVEL),
INTR_PROP_DESC(78, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S, GIC_INTR_CFG_LEVEL), // <--- My entry here
};
const gicv3_driver_data_t arm_gic_data = {
.gicd_base = PLAT_GICD_BASE,
.gicr_base = PLAT_GICR_BASE,
.interrupt_props = g01s_interrupt_props,
.interrupt_props_num = ARRAY_SIZE(g01s_interrupt_props),
.rdistif_num = PLATFORM_CORE_COUNT,
.rdistif_base_addrs = rdistif_base_addrs,
.mpidr_to_core_pos = plat_imx_mpidr_to_core_pos,
};
```
The third entry for interrupt 78 is the entry I added, in the hope it would be routed to OP-TEE. However, when the interrupt is triggered, it is sent to GNU/Linux (which I determined via `/proc/interrupts`). I would have expected the interrupt to be routed to OP-TEE OS and handled by my interrupt handler there instead.
Is my general approach correct or am I on the wrong path? I have to admit I am not fully understanding the documentation regarding interrupts in TF-A, OP-TEE OS and the Arm GIC specification, so any pointers would be highly appreciated.
Thank you in advance!
**Edit:**
I have verified my interrupt entry is processed inside `gicv3_secure_spis_config_props`
According to the source code it should:
* Configure this interrupt as a secure interrupt
* Configure this interrupt as G0 or a G1S interrupt
* Set interrupt configuration
* Set the priority of this interrupt
* Target SPIs to the primary CPU
* Enable this interrupt
Therefore I would assume this watchdog interrupt should *not* be passed to GNU/Linux. It is disabled in the device tree, too.