On cores that have the `MPIDR.MT` bit set,
- affinity level 0 is the thread ID
- affinity level 1 is the CPU ID
- affinity level 2 is the cluster ID
Thus, on these cores, the `MPIDR_CPU_ID` (resp. `MPIDR_CLUSTER_ID`) macro should extract bits 8 to 15 (resp. 16 to 23). At the moment, these macros do not inspect the `MPIDR.MT` bit (see [[ https://git.trustedfirmware.org/tf-a-tests.git/tree/include/lib/aarch64/arch.h?id=aef556a8b784fe98fad89591e097b486ab92f6c8#n72 | their definitions ]]) so they will not work as intended on multi-threaded cores.
This can be easily reproduced on the AEM FVP (revC), which has the `MPIDR.MT` bit set for all cores.
{F8336}
Attached is a patch that modifies the //template// multi-core test to print the output of these macros for each core. This incorrectly shows:
```
[cpu 0x0000] cluster ID: 0
[cpu 0x0000] CPU ID: 0
[cpu 0x0100] MPID=0x81000100
[cpu 0x0100] cluster ID: 1
[cpu 0x0100] CPU ID: 0
[cpu 0x0200] MPID=0x81000200
[cpu 0x0200] cluster ID: 2
[cpu 0x0200] CPU ID: 0
[cpu 0x0300] MPID=0x81000300
[cpu 0x0300] cluster ID: 3
[cpu 0x0300] CPU ID: 0
[cpu 0x0000] MPID=0x81010000
[cpu 0x0000] cluster ID: 0
[cpu 0x0000] CPU ID: 0
[cpu 0x0100] MPID=0x81010100
[cpu 0x0100] cluster ID: 1
[cpu 0x0100] CPU ID: 0
[cpu 0x0200] MPID=0x81010200
[cpu 0x0200] cluster ID: 2
[cpu 0x0200] CPU ID: 0
[cpu 0x0300] MPID=0x81010300
[cpu 0x0300] cluster ID: 3
[cpu 0x0300] CPU ID: 0
```