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Optimise SPM operations in Library mode
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Description

A set of patches which aim to:

  • Remove not necessary SVC calls in Library mode / Level 1 isolation for Secure APIs that don't cross security isolation boundaries
  • Reduce the priority of the SPM processing (start and stop partitions) in order to allow SPM processing to be interrupted by ISRs thus reducing ISR processing latency

Event Timeline

Note that as part of this activity the following bug in the Qemu porting o the mps2-an521 board has been found and fixed with the following pull request:

https://patchew.org/QEMU/20210520130905.2049-1-peter.maydell@linaro.org/