Phriction Trusted Firmware Trusted Firmware-A (TF-A) Patchdescription Platarmboardfvpplatformmkvsplatarmboardfvp Rplatformmk History Version 1 vs 2
Version 1 vs 2
Version 1 vs 2
Edits
Edits
- Edit by garymorrison-arm, Version 2
- Jul 2 2021 9:47 PM
- Edit by garymorrison-arm, Version 1
- Jul 2 2021 9:37 PM
| Original Change | Most Recent Change |
| Edit Older Version 1... | Edit Current Version 2... |
Content Changes
Content Changes
```
# #
# Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved. | # Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
# Use the GICv3 driver on the FVP by default | NO_EL3 := 1
FVP_USE_GIC_DRIVER := FVP_GICV3 <
# Default cluster count for FVP | # Only aarch64 ARCH supported for FVP_R
FVP_CLUSTER_COUNT := 2 | ARCH := aarch64
# Default number of CPUs per cluster on FVP | # Override to exclude BL2, BL2U, BL31, and BL33 for FVP_R
FVP_MAX_CPUS_PER_CLUSTER := 4 | override NEED_BL2 := no
> override NEED_BL2U := no
> override NEED_BL31 := no
# Default number of threads per CPU on FVP | override CTX_INCLUDE_AARCH32_REGS := 0
FVP_MAX_PE_PER_CPU := 1 <
# Disable redistributor frame of inactive/fused CPU cores by marking it as rea | # Default cluster count for FVP_R
# only; enable redistributor frames of all CPU cores by default. | FVP_R_CLUSTER_COUNT := 2
FVP_GICR_REGION_PROTECTION := 0 <
FVP_DT_PREFIX := fvp-base-gicv3-psci | # Default number of CPUs per cluster on FVP_R
> FVP_R_MAX_CPUS_PER_CLUSTER := 4
# The FVP platform depends on this macro to build with correct GIC driver. | # Default number of threads per CPU on FVP_R
$(eval $(call add_define,FVP_USE_GIC_DRIVER)) | FVP_R_MAX_PE_PER_CPU := 1
# Pass FVP_CLUSTER_COUNT to the build system. | # Use MPU-based memory management:
$(eval $(call add_define,FVP_CLUSTER_COUNT)) | XLAT_TABLES_LIB_V2 := 0
> ARM_XLAT_TABLES_LIB_V1 := 0
> XLAT_MPU_LIB_V1 := 1
# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. | # Pass FVP_R_CLUSTER_COUNT to the build system.
$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) | $(eval $(call add_define,FVP_R_CLUSTER_COUNT))
# Pass FVP_MAX_PE_PER_CPU to the build system. | # Pass FVP_R_MAX_CPUS_PER_CLUSTER to the build system.
$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) | $(eval $(call add_define,FVP_R_MAX_CPUS_PER_CLUSTER))
# Pass FVP_GICR_REGION_PROTECTION to the build system. | # Pass FVP_R_MAX_PE_PER_CPU to the build system.
$(eval $(call add_define,FVP_GICR_REGION_PROTECTION)) | $(eval $(call add_define,FVP_R_MAX_PE_PER_CPU))
# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, | # Sanity check the cluster count and if FVP_R_CLUSTER_COUNT <= 2,
# choose the CCI driver , else the CCN driver # choose the CCI driver , else the CCN driver
ifeq ($(FVP_CLUSTER_COUNT), 0) | ifeq ($(FVP_R_CLUSTER_COUNT), 0)
$(error "Incorrect cluster count specified for FVP port") | $(error "Incorrect cluster count specified for FVP_R port")
else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) | else ifeq ($(FVP_R_CLUSTER_COUNT),$(filter $(FVP_R_CLUSTER_COUNT),1 2))
FVP_INTERCONNECT_DRIVER := FVP_CCI | FVP_R_INTERCONNECT_DRIVER := FVP_R_CCI
else else
FVP_INTERCONNECT_DRIVER := FVP_CCN | FVP_R_INTERCONNECT_DRIVER := FVP_R_CCN
endif endif
$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) | $(eval $(call add_define,FVP_R_INTERCONNECT_DRIVER))
# Choose the GIC sources depending upon the how the FVP will be invoked | ifeq (${FVP_R_INTERCONNECT_DRIVER}, FVP_R_CCI)
ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) | FVP_R_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c
| else ifeq (${FVP_R_INTERCONNECT_DRIVER}, FVP_R_CCN)
# The GIC model (GIC-600 or GIC-500) will be detected at runtime | FVP_R_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \
GICV3_SUPPORT_GIC600 := 1 <
GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 <
<
# Include GICv3 driver files <
include drivers/arm/gic/v3/gicv3.mk <
<
FVP_GIC_SOURCES := ${GICV3_SOURCES} \ <
plat/common/plat_gicv3.c \ <
plat/arm/common/arm_gicv3.c <
<
ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) <
FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c <
endif <
<
else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) <
<
# No GICv4 extension <
GIC_ENABLE_V4_EXTN := 0 <
$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) <
<
# Include GICv2 driver files <
include drivers/arm/gic/v2/gicv2.mk <
<
FVP_GIC_SOURCES := ${GICV2_SOURCES} \ <
plat/common/plat_gicv2.c \ <
plat/arm/common/arm_gicv2.c <
<
FVP_DT_PREFIX := fvp-base-gicv2-psci <
else <
$(error "Incorrect GIC driver chosen on FVP port") <
endif <
<
ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) <
FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c <
else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) <
FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ <
plat/arm/common/arm_ccn.c plat/arm/common/arm_ccn.c
else else
$(error "Incorrect CCN driver chosen on FVP port") | $(error "Incorrect CCN driver chosen on FVP_R port")
endif endif
FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ | PLAT_INCLUDES := -Iplat/arm/board/fvp_r/include
plat/arm/board/fvp/fvp_security.c \ <
plat/arm/common/arm_tzc400.c <
<
<
PLAT_INCLUDES := -Iplat/arm/board/fvp/include <
<
PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c | PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp_r/fvp_r_common.c
FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S | FVP_R_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
<
ifeq (${ARCH}, aarch64) <
# select a different set of CPU files, depending on whether we compile for # select a different set of CPU files, depending on whether we compile for
# hardware assisted coherency cores or not # hardware assisted coherency cores or not
ifeq (${HW_ASSISTED_COHERENCY}, 0) ifeq (${HW_ASSISTED_COHERENCY}, 0)
# Cores used without DSU # Cores used without DSU
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S | # FVP_R_CPU_LIBS += lib/cpus/aarch64/fvp_r.S
lib/cpus/aarch64/cortex_a53.S <
lib/cpus/aarch64/cortex_a57.S <
lib/cpus/aarch64/cortex_a72.S <
lib/cpus/aarch64/cortex_a73.S <
else else
# Cores used with DSU only # Cores used with DSU only
ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) | # FVP_R_CPU_LIBS += lib/cpus/aarch64/fvp_r.S
# AArch64-only cores <
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S <
lib/cpus/aarch64/cortex_a76ae.S <
lib/cpus/aarch64/cortex_a77.S <
lib/cpus/aarch64/cortex_a78.S <
lib/cpus/aarch64/neoverse_n_common.S <
lib/cpus/aarch64/neoverse_n1.S <
lib/cpus/aarch64/neoverse_n2.S <
lib/cpus/aarch64/neoverse_e1.S <
lib/cpus/aarch64/neoverse_v1.S <
lib/cpus/aarch64/cortex_a78_ae.S <
lib/cpus/aarch64/cortex_a510.S <
lib/cpus/aarch64/cortex_a710.S \ <
lib/cpus/aarch64/cortex_makalu.S <
lib/cpus/aarch64/cortex_makalu_elp_arm <
lib/cpus/aarch64/cortex_a65.S <
lib/cpus/aarch64/cortex_a65ae.S <
lib/cpus/aarch64/cortex_a78c.S <
endif <
# AArch64/AArch32 cores <
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ <
lib/cpus/aarch64/cortex_a75.S <
endif endif
else | BL1_SOURCES += drivers/arm/sp805/sp805.c
FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S <
endif <
<
BL1_SOURCES += drivers/arm/smmu/smmu_v3.c <
drivers/arm/sp805/sp805.c <
drivers/delay_timer/delay_timer.c drivers/delay_timer/delay_timer.c
drivers/io/io_semihosting.c drivers/io/io_semihosting.c
lib/semihosting/semihosting.c lib/semihosting/semihosting.c
lib/semihosting/${ARCH}/semihosting_call.S lib/semihosting/${ARCH}/semihosting_call.S
plat/arm/board/fvp/${ARCH}/fvp_helpers.S | plat/arm/board/fvp_r/fvp_r_bl1_arch_setup.c
plat/arm/board/fvp/fvp_bl1_setup.c | plat/arm/board/fvp_r/fvp_r_bl1_setup.c
plat/arm/board/fvp/fvp_err.c | plat/arm/board/fvp_r/fvp_r_context_mgmt.c
plat/arm/board/fvp/fvp_io_storage.c | plat/arm/board/fvp_r/fvp_r_bl1_main.c
${FVP_CPU_LIBS} | plat/arm/board/fvp_r/fvp_r_err.c
${FVP_INTERCONNECT_SOURCES} | plat/arm/board/fvp_r/fvp_r_io_storage.c
> plat/arm/board/fvp_r/fvp_r_bl1_entrypoint.S
> plat/arm/board/fvp_r/fvp_r_bl1_exceptions.S
> plat/arm/board/fvp_r/fvp_r_context.S
> plat/arm/board/fvp_r/fvp_r_debug.S
> plat/arm/board/fvp_r/fvp_r_helpers.S
> plat/arm/board/fvp_r/fvp_r_misc_helpers.S
> plat/arm/board/fvp_r/fvp_r_pauth_helpers.S
> ${FVP_R_CPU_LIBS}
> ${FVP_R_INTERCONNECT_SOURCES}
ifeq (${USE_SP804_TIMER},1) ifeq (${USE_SP804_TIMER},1)
BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c
else else
BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c
endif endif
<
BL2_SOURCES += drivers/arm/sp805/sp805.c <
drivers/io/io_semihosting.c <
lib/utils/mem_region.c <
lib/semihosting/semihosting.c <
lib/semihosting/${ARCH}/semihosting_call.S <
plat/arm/board/fvp/fvp_bl2_setup.c <
plat/arm/board/fvp/fvp_err.c <
plat/arm/board/fvp/fvp_io_storage.c <
plat/arm/common/arm_nor_psci_mem_protect.c <
${FVP_SECURITY_SOURCES} <
<
<
ifeq (${COT_DESC_IN_DTB},1) <
BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c <
endif <
<
ifeq (${BL2_AT_EL3},1) <
BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S <
plat/arm/board/fvp/fvp_bl2_el3_setup.c <
${FVP_CPU_LIBS} <
${FVP_INTERCONNECT_SOURCES} <
endif <
<
ifeq (${USE_SP804_TIMER},1) <
BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c <
endif <
<
BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c <
${FVP_SECURITY_SOURCES} <
<
ifeq (${USE_SP804_TIMER},1) <
BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c <
endif <
<
BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c <
drivers/arm/smmu/smmu_v3.c <
drivers/delay_timer/delay_timer.c <
drivers/cfi/v2m/v2m_flash.c <
lib/utils/mem_region.c <
plat/arm/board/fvp/fvp_bl31_setup.c <
plat/arm/board/fvp/fvp_console.c <
plat/arm/board/fvp/fvp_pm.c <
plat/arm/board/fvp/fvp_topology.c <
plat/arm/board/fvp/aarch64/fvp_helpers.S <
plat/arm/common/arm_nor_psci_mem_protect.c <
${FVP_CPU_LIBS} <
${FVP_GIC_SOURCES} <
${FVP_INTERCONNECT_SOURCES} <
${FVP_SECURITY_SOURCES} <
<
# Support for fconf in BL31 <
# Added separately from the above list for better readability <
ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) <
BL31_SOURCES += common/fdt_wrappers.c <
lib/fconf/fconf.c <
lib/fconf/fconf_dyn_cfg_getter.c <
plat/arm/board/fvp/fconf/fconf_hw_config_gette <
<
ifeq (${SEC_INT_DESC_IN_FCONF},1) <
BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c <
endif <
<
endif <
<
ifeq (${USE_SP804_TIMER},1) <
BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c <
else <
BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c <
endif <
<
# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) <
ifdef UNIX_MK <
FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts <
FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ <
${PLAT}_fw_config.dts \ <
${PLAT}_tb_fw_config.dts \ <
${PLAT}_soc_fw_config.dts \ <
${PLAT}_nt_fw_config.dts \ <
) <
<
FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb <
FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb <
FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb <
FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb <
<
ifeq (${SPD},tspd) <
FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config. <
FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb <
<
# Add the TOS_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_ <
endif <
<
ifeq (${SPD},spmd) <
<
ifeq ($(ARM_SPMC_MANIFEST_DTS),) <
ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest. <
endif <
<
FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} <
FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_S <
<
# Add the TOS_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_ <
endif <
<
# Add the FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG})) <
# Add the TB_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_ <
# Add the SOC_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_ <
# Add the NT_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_ <
<
FDT_SOURCES += ${FVP_HW_CONFIG_DTS} <
$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_ <
<
# Add the HW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG})) <
endif <
<
# Enable Activity Monitor Unit extensions by default # Enable Activity Monitor Unit extensions by default
ENABLE_AMU := 1 ENABLE_AMU := 1
# Enable dynamic mitigation support by default <
DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 <
<
# Enable reclaiming of BL31 initialisation code for secondary cores <
# stacks for FVP. However, don't enable reclaiming for clang. <
ifneq (${RESET_TO_BL31},1) <
ifeq ($(findstring clang,$(notdir $(CC))),) <
RECLAIM_INIT_CODE := 1 <
endif <
endif <
<
ifeq (${ENABLE_AMU},1) <
BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ <
lib/cpus/aarch64/cpuamu_helpers.S <
<
ifeq (${HW_ASSISTED_COHERENCY}, 1) <
BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ <
lib/cpus/aarch64/neoverse_n1_pubsub.c <
endif <
endif <
<
ifeq (${RAS_EXTENSION},1) <
BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c <
endif <
<
ifneq (${ENABLE_STACK_PROTECTOR},0) ifneq (${ENABLE_STACK_PROTECTOR},0)
PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c | PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp_r/fvp_r_stack_protector.c
endif endif
ifeq (${ARCH},aarch32) | NEED_BL32 := no
NEED_BL32 := yes <
endif <
<
# Enable the dynamic translation tables library. <
ifeq (${ARCH},aarch32) <
ifeq (${RESET_TO_SP_MIN},1) <
BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
else # AArch64 <
ifeq (${RESET_TO_BL31},1) <
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
ifeq (${SPD},trusty) <
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
endif <
<
ifeq (${ALLOW_RO_XLAT_TABLES}, 1) <
ifeq (${ARCH},aarch32) <
BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES <
else # AArch64 <
BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES <
ifeq (${SPD},tspd) <
BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES <
endif <
endif <
endif <
<
ifeq (${USE_DEBUGFS},1) <
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
<
# Add support for platform supplied linker script for BL31 build <
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) <
ifneq (${BL2_AT_EL3}, 0) ifneq (${BL2_AT_EL3}, 0)
override BL1_SOURCES = override BL1_SOURCES =
endif endif
include plat/arm/board/common/board_common.mk include plat/arm/board/common/board_common.mk
include plat/arm/common/arm_common.mk include plat/arm/common/arm_common.mk
ifeq (${TRUSTED_BOARD_BOOT}, 1) ifeq (${TRUSTED_BOARD_BOOT}, 1)
BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c | BL1_SOURCES += plat/arm/board/fvp_r/fvp_r_trusted_boot.c
BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c <
<
ifeq (${MEASURED_BOOT},1) <
BL2_SOURCES += plat/arm/board/fvp/fvp_measured_boot.c <
endif <
# FVP being a development platform, enable capability to disable Authenticatio # FVP being a development platform, enable capability to disable Authenticatio
# dynamically if TRUSTED_BOARD_BOOT is set. # dynamically if TRUSTED_BOARD_BOOT is set.
DYN_DISABLE_AUTH := 1 DYN_DISABLE_AUTH := 1
endif endif
```
```
# #
# Copyright (c) 2013-2021, Arm Limited and Contributors. A | # Copyright (c) 2013-2021, ARM Limited and Contributors. A
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
# Use the GICv3 driver on the FVP by default | NO_EL3 := 1
FVP_USE_GIC_DRIVER := FVP_GICV3 <
# Default cluster count for FVP | # Only aarch64 ARCH supported for FVP_R
FVP_CLUSTER_COUNT := 2 | ARCH := aarch64
# Default number of CPUs per cluster on FVP | # Override to exclude BL2, BL2U, BL31, and BL33 for FVP_R
FVP_MAX_CPUS_PER_CLUSTER := 4 | override NEED_BL2 := no
> override NEED_BL2U := no
> override NEED_BL31 := no
# Default number of threads per CPU on FVP | override CTX_INCLUDE_AARCH32_REGS := 0
FVP_MAX_PE_PER_CPU := 1 <
# Disable redistributor frame of inactive/fused CPU cores | # Default cluster count for FVP_R
# only; enable redistributor frames of all CPU cores by de | FVP_R_CLUSTER_COUNT := 2
FVP_GICR_REGION_PROTECTION := 0 <
FVP_DT_PREFIX := fvp-base-gicv3-psci | # Default number of CPUs per cluster on FVP_R
> FVP_R_MAX_CPUS_PER_CLUSTER := 4
# The FVP platform depends on this macro to build with cor | # Default number of threads per CPU on FVP_R
$(eval $(call add_define,FVP_USE_GIC_DRIVER)) | FVP_R_MAX_PE_PER_CPU := 1
# Pass FVP_CLUSTER_COUNT to the build system. | # Use MPU-based memory management:
$(eval $(call add_define,FVP_CLUSTER_COUNT)) | XLAT_TABLES_LIB_V2 := 0
> ARM_XLAT_TABLES_LIB_V1 := 0
> XLAT_MPU_LIB_V1 := 1
# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. | # Pass FVP_R_CLUSTER_COUNT to the build system.
$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) | $(eval $(call add_define,FVP_R_CLUSTER_COUNT))
# Pass FVP_MAX_PE_PER_CPU to the build system. | # Pass FVP_R_MAX_CPUS_PER_CLUSTER to the build system.
$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) | $(eval $(call add_define,FVP_R_MAX_CPUS_PER_CLUSTER))
# Pass FVP_GICR_REGION_PROTECTION to the build system. | # Pass FVP_R_MAX_PE_PER_CPU to the build system.
$(eval $(call add_define,FVP_GICR_REGION_PROTECTION)) | $(eval $(call add_define,FVP_R_MAX_PE_PER_CPU))
# Sanity check the cluster count and if FVP_CLUSTER_COUNT | # Sanity check the cluster count and if FVP_R_CLUSTER_COUN
# choose the CCI driver , else the CCN driver # choose the CCI driver , else the CCN driver
ifeq ($(FVP_CLUSTER_COUNT), 0) | ifeq ($(FVP_R_CLUSTER_COUNT), 0)
$(error "Incorrect cluster count specified for FVP port") | $(error "Incorrect cluster count specified for FVP_R port"
else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COU | else ifeq ($(FVP_R_CLUSTER_COUNT),$(filter $(FVP_R_CLUSTER
FVP_INTERCONNECT_DRIVER := FVP_CCI | FVP_R_INTERCONNECT_DRIVER := FVP_R_CCI
else else
FVP_INTERCONNECT_DRIVER := FVP_CCN | FVP_R_INTERCONNECT_DRIVER := FVP_R_CCN
endif endif
$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) | $(eval $(call add_define,FVP_R_INTERCONNECT_DRIVER))
# Choose the GIC sources depending upon the how the FVP wi | ifeq (${FVP_R_INTERCONNECT_DRIVER}, FVP_R_CCI)
ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) | FVP_R_INTERCONNECT_SOURCES := drivers/arm/cci/cc
| else ifeq (${FVP_R_INTERCONNECT_DRIVER}, FVP_R_CCN)
# The GIC model (GIC-600 or GIC-500) will be detected at r | FVP_R_INTERCONNECT_SOURCES := drivers/arm/ccn/cc
GICV3_SUPPORT_GIC600 := 1 <
GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 <
<
# Include GICv3 driver files <
include drivers/arm/gic/v3/gicv3.mk <
<
FVP_GIC_SOURCES := ${GICV3_SOURCES} <
plat/common/plat_gicv3.c <
plat/arm/common/arm_gicv3. <
<
ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${ <
FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_ <
endif <
<
else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) <
<
# No GICv4 extension <
GIC_ENABLE_V4_EXTN := 0 <
$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) <
<
# Include GICv2 driver files <
include drivers/arm/gic/v2/gicv2.mk <
<
FVP_GIC_SOURCES := ${GICV2_SOURCES} <
plat/common/plat_gicv2.c <
plat/arm/common/arm_gicv2. <
<
FVP_DT_PREFIX := fvp-base-gicv2-psci <
else <
$(error "Incorrect GIC driver chosen on FVP port") <
endif <
<
ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) <
FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cc <
else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) <
FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/cc <
plat/arm/common/ar plat/arm/common/ar
else else
$(error "Incorrect CCN driver chosen on FVP port") | $(error "Incorrect CCN driver chosen on FVP_R port")
endif endif
FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c | PLAT_INCLUDES := -Iplat/arm/board/fvp_r/inc
plat/arm/board/fvp/fvp_sec <
plat/arm/common/arm_tzc400 <
<
<
PLAT_INCLUDES := -Iplat/arm/board/fvp/inclu <
<
PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_com | PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp_r/fvp_r
FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_gener | FVP_R_CPU_LIBS := lib/cpus/${ARCH}/aem_gener
<
ifeq (${ARCH}, aarch64) <
# select a different set of CPU files, depending on whethe # select a different set of CPU files, depending on whethe
# hardware assisted coherency cores or not # hardware assisted coherency cores or not
ifeq (${HW_ASSISTED_COHERENCY}, 0) ifeq (${HW_ASSISTED_COHERENCY}, 0)
# Cores used without DSU # Cores used without DSU
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a3 | # FVP_R_CPU_LIBS += lib/cpus/aarch64/fvp_r.S
lib/cpus/aarch64/cortex_a5 <
lib/cpus/aarch64/cortex_a5 <
lib/cpus/aarch64/cortex_a7 <
lib/cpus/aarch64/cortex_a7 <
else else
# Cores used with DSU only # Cores used with DSU only
ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) | # FVP_R_CPU_LIBS += lib/cpus/aarch64/fvp_r.S
# AArch64-only cores <
FVP_CPU_LIBS += lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
lib/cpus/aarch64/n <
lib/cpus/aarch64/n <
lib/cpus/aarch64/n <
lib/cpus/aarch64/n <
lib/cpus/aarch64/n <
lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
lib/cpus/aarch64/c <
endif <
# AArch64/AArch32 cores <
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a5 <
lib/cpus/aarch64/cortex_a7 <
endif endif
else | BL1_SOURCES += drivers/arm/sp805/sp805.c
FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a3 <
endif <
<
BL1_SOURCES += drivers/arm/smmu/smmu_v3.c <
drivers/arm/sp805/sp805.c <
drivers/delay_timer/delay_ drivers/delay_timer/delay_
drivers/io/io_semihosting. drivers/io/io_semihosting.
lib/semihosting/semihostin lib/semihosting/semihostin
lib/semihosting/${ARCH}/se lib/semihosting/${ARCH}/se
plat/arm/board/fvp/${ARCH} | plat/arm/board/fvp_r/fvp_r
plat/arm/board/fvp/fvp_bl1 | plat/arm/board/fvp_r/fvp_r
plat/arm/board/fvp/fvp_err | plat/arm/board/fvp_r/fvp_r
plat/arm/board/fvp/fvp_io_ | plat/arm/board/fvp_r/fvp_r
${FVP_CPU_LIBS} | plat/arm/board/fvp_r/fvp_r
${FVP_INTERCONNECT_SOURCES | plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> ${FVP_R_CPU_LIBS}
> ${FVP_R_INTERCONNECT_SOURC
ifeq (${USE_SP804_TIMER},1) ifeq (${USE_SP804_TIMER},1)
BL1_SOURCES += drivers/arm/sp804/sp804_de BL1_SOURCES += drivers/arm/sp804/sp804_de
else else
BL1_SOURCES += drivers/delay_timer/generi BL1_SOURCES += drivers/delay_timer/generi
endif endif
<
BL2_SOURCES += drivers/arm/sp805/sp805.c <
drivers/io/io_semihosting. <
lib/utils/mem_region.c <
lib/semihosting/semihostin <
lib/semihosting/${ARCH}/se <
plat/arm/board/fvp/fvp_bl2 <
plat/arm/board/fvp/fvp_err <
plat/arm/board/fvp/fvp_io_ <
plat/arm/common/arm_nor_ps <
${FVP_SECURITY_SOURCES} <
<
<
ifeq (${COT_DESC_IN_DTB},1) <
BL2_SOURCES += plat/arm/common/fconf/fcon <
endif <
<
ifeq (${BL2_AT_EL3},1) <
BL2_SOURCES += plat/arm/board/fvp/${ARCH} <
plat/arm/board/fvp/fvp_bl2 <
${FVP_CPU_LIBS} <
${FVP_INTERCONNECT_SOURCES <
endif <
<
ifeq (${USE_SP804_TIMER},1) <
BL2_SOURCES += drivers/arm/sp804/sp804_de <
endif <
<
BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2 <
${FVP_SECURITY_SOURCES} <
<
ifeq (${USE_SP804_TIMER},1) <
BL2U_SOURCES += drivers/arm/sp804/sp804_de <
endif <
<
BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c <
drivers/arm/smmu/smmu_v3.c <
drivers/delay_timer/delay_ <
drivers/cfi/v2m/v2m_flash. <
lib/utils/mem_region.c <
plat/arm/board/fvp/fvp_bl3 <
plat/arm/board/fvp/fvp_con <
plat/arm/board/fvp/fvp_pm. <
plat/arm/board/fvp/fvp_top <
plat/arm/board/fvp/aarch64 <
plat/arm/common/arm_nor_ps <
${FVP_CPU_LIBS} <
${FVP_GIC_SOURCES} <
${FVP_INTERCONNECT_SOURCES <
${FVP_SECURITY_SOURCES} <
<
# Support for fconf in BL31 <
# Added separately from the above list for better readabil <
ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) <
BL31_SOURCES += common/fdt_wrappers.c <
lib/fconf/fconf.c <
lib/fconf/fconf_dyn_cfg_ge <
plat/arm/board/fvp/fconf/f <
<
ifeq (${SEC_INT_DESC_IN_FCONF},1) <
BL31_SOURCES += plat/arm/common/fconf/fcon <
endif <
<
endif <
<
ifeq (${USE_SP804_TIMER},1) <
BL31_SOURCES += drivers/arm/sp804/sp804_de <
else <
BL31_SOURCES += drivers/delay_timer/generi <
endif <
<
# Add the FDT_SOURCES and options for Dynamic Config (only <
ifdef UNIX_MK <
FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts <
FDT_SOURCES += $(addprefix plat/arm/board <
${PLAT}_fw_config. <
${PLAT}_tb_fw_conf <
${PLAT}_soc_fw_con <
${PLAT}_nt_fw_conf <
) <
<
FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT} <
FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT} <
FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT} <
FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT} <
<
ifeq (${SPD},tspd) <
FDT_SOURCES += plat/arm/board/fvp/fdts/${ <
FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT} <
<
# Add the TOS_FW_CONFIG to FIP and specify the same to cer <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos- <
endif <
<
ifeq (${SPD},spmd) <
<
ifeq ($(ARM_SPMC_MANIFEST_DTS),) <
ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${ <
endif <
<
FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} <
FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdi <
<
# Add the TOS_FW_CONFIG to FIP and specify the same to cer <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos- <
endif <
<
# Add the FW_CONFIG to FIP and specify the same to certtoo <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-confi <
# Add the TB_FW_CONFIG to FIP and specify the same to cert <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw <
# Add the SOC_FW_CONFIG to FIP and specify the same to cer <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc- <
# Add the NT_FW_CONFIG to FIP and specify the same to cert <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw <
<
FDT_SOURCES += ${FVP_HW_CONFIG_DTS} <
$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst % <
<
# Add the HW_CONFIG to FIP and specify the same to certtoo <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-confi <
endif <
<
# Enable Activity Monitor Unit extensions by default # Enable Activity Monitor Unit extensions by default
ENABLE_AMU := 1 ENABLE_AMU := 1
# Enable dynamic mitigation support by default <
DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 <
<
# Enable reclaiming of BL31 initialisation code for second <
# stacks for FVP. However, don't enable reclaiming for cla <
ifneq (${RESET_TO_BL31},1) <
ifeq ($(findstring clang,$(notdir $(CC))),) <
RECLAIM_INIT_CODE := 1 <
endif <
endif <
<
ifeq (${ENABLE_AMU},1) <
BL31_SOURCES += lib/cpus/aarch64/cpuamu.c <
lib/cpus/aarch64/cpuamu_he <
<
ifeq (${HW_ASSISTED_COHERENCY}, 1) <
BL31_SOURCES += lib/cpus/aarch64/cortex_a7 <
lib/cpus/aarch64/neoverse_ <
endif <
endif <
<
ifeq (${RAS_EXTENSION},1) <
BL31_SOURCES += plat/arm/board/fvp/aarch64 <
endif <
<
ifneq (${ENABLE_STACK_PROTECTOR},0) ifneq (${ENABLE_STACK_PROTECTOR},0)
PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_sta | PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp_r/fvp_r
endif endif
ifeq (${ARCH},aarch32) | NEED_BL32 := no
NEED_BL32 := yes <
endif <
<
# Enable the dynamic translation tables library. <
ifeq (${ARCH},aarch32) <
ifeq (${RESET_TO_SP_MIN},1) <
BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
else # AArch64 <
ifeq (${RESET_TO_BL31},1) <
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
ifeq (${SPD},trusty) <
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
endif <
<
ifeq (${ALLOW_RO_XLAT_TABLES}, 1) <
ifeq (${ARCH},aarch32) <
BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES <
else # AArch64 <
BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES <
ifeq (${SPD},tspd) <
BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES <
endif <
endif <
endif <
<
ifeq (${USE_DEBUGFS},1) <
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
<
# Add support for platform supplied linker script for BL31 <
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) <
ifneq (${BL2_AT_EL3}, 0) ifneq (${BL2_AT_EL3}, 0)
override BL1_SOURCES = override BL1_SOURCES =
endif endif
include plat/arm/board/common/board_common.mk include plat/arm/board/common/board_common.mk
include plat/arm/common/arm_common.mk include plat/arm/common/arm_common.mk
ifeq (${TRUSTED_BOARD_BOOT}, 1) ifeq (${TRUSTED_BOARD_BOOT}, 1)
BL1_SOURCES += plat/arm/board/fvp/fvp_tru | BL1_SOURCES += plat/arm/board/fvp_r/fvp_r
BL2_SOURCES += plat/arm/board/fvp/fvp_tru <
<
ifeq (${MEASURED_BOOT},1) <
BL2_SOURCES += plat/arm/board/fvp/fvp_mea <
endif <
# FVP being a development platform, enable capability to d # FVP being a development platform, enable capability to d
# dynamically if TRUSTED_BOARD_BOOT is set. # dynamically if TRUSTED_BOARD_BOOT is set.
DYN_DISABLE_AUTH := 1 DYN_DISABLE_AUTH := 1
endif endif
```
```
# #
# Copyright (c) 2013-2021, Arm Limited and Contributors. All rights reserved. | # Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
# #
# SPDX-License-Identifier: BSD-3-Clause # SPDX-License-Identifier: BSD-3-Clause
# #
# Use the GICv3 driver on the FVP by default | NO_EL3 := 1
FVP_USE_GIC_DRIVER := FVP_GICV3 <
# Default cluster count for FVP | # Only aarch64 ARCH supported for FVP_R
FVP_CLUSTER_COUNT := 2 | ARCH := aarch64
# Default number of CPUs per cluster on FVP | # Override to exclude BL2, BL2U, BL31, and BL33 for FVP_R
FVP_MAX_CPUS_PER_CLUSTER := 4 | override NEED_BL2 := no
> override NEED_BL2U := no
> override NEED_BL31 := no
# Default number of threads per CPU on FVP | override CTX_INCLUDE_AARCH32_REGS := 0
FVP_MAX_PE_PER_CPU := 1 <
# Disable redistributor frame of inactive/fused CPU cores by marking it as rea | # Default cluster count for FVP_R
# only; enable redistributor frames of all CPU cores by default. | FVP_R_CLUSTER_COUNT := 2
FVP_GICR_REGION_PROTECTION := 0 <
FVP_DT_PREFIX := fvp-base-gicv3-psci | # Default number of CPUs per cluster on FVP_R
> FVP_R_MAX_CPUS_PER_CLUSTER := 4
# The FVP platform depends on this macro to build with correct GIC driver. | # Default number of threads per CPU on FVP_R
$(eval $(call add_define,FVP_USE_GIC_DRIVER)) | FVP_R_MAX_PE_PER_CPU := 1
# Pass FVP_CLUSTER_COUNT to the build system. | # Use MPU-based memory management:
$(eval $(call add_define,FVP_CLUSTER_COUNT)) | XLAT_TABLES_LIB_V2 := 0
> ARM_XLAT_TABLES_LIB_V1 := 0
> XLAT_MPU_LIB_V1 := 1
# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. | # Pass FVP_R_CLUSTER_COUNT to the build system.
$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) | $(eval $(call add_define,FVP_R_CLUSTER_COUNT))
# Pass FVP_MAX_PE_PER_CPU to the build system. | # Pass FVP_R_MAX_CPUS_PER_CLUSTER to the build system.
$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) | $(eval $(call add_define,FVP_R_MAX_CPUS_PER_CLUSTER))
# Pass FVP_GICR_REGION_PROTECTION to the build system. | # Pass FVP_R_MAX_PE_PER_CPU to the build system.
$(eval $(call add_define,FVP_GICR_REGION_PROTECTION)) | $(eval $(call add_define,FVP_R_MAX_PE_PER_CPU))
# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, | # Sanity check the cluster count and if FVP_R_CLUSTER_COUNT <= 2,
# choose the CCI driver , else the CCN driver # choose the CCI driver , else the CCN driver
ifeq ($(FVP_CLUSTER_COUNT), 0) | ifeq ($(FVP_R_CLUSTER_COUNT), 0)
$(error "Incorrect cluster count specified for FVP port") | $(error "Incorrect cluster count specified for FVP_R port")
else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) | else ifeq ($(FVP_R_CLUSTER_COUNT),$(filter $(FVP_R_CLUSTER_COUNT),1 2))
FVP_INTERCONNECT_DRIVER := FVP_CCI | FVP_R_INTERCONNECT_DRIVER := FVP_R_CCI
else else
FVP_INTERCONNECT_DRIVER := FVP_CCN | FVP_R_INTERCONNECT_DRIVER := FVP_R_CCN
endif endif
$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) | $(eval $(call add_define,FVP_R_INTERCONNECT_DRIVER))
# Choose the GIC sources depending upon the how the FVP will be invoked | ifeq (${FVP_R_INTERCONNECT_DRIVER}, FVP_R_CCI)
ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) | FVP_R_INTERCONNECT_SOURCES := drivers/arm/cci/cci.ccc
| else ifeq (${FVP_R_INTERCONNECT_DRIVER}, FVP_R_CCN)
# The GIC model (GIC-600 or GIC-500) will be detected at runtime r | FVP_R_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \cc
GICV3_SUPPORT_GIC600 := 1 <
GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 <
<
# Include GICv3 driver files <
include drivers/arm/gic/v3/gicv3.mk <
<
FVP_GIC_SOURCES := ${GICV3_SOURCES} \ <
plat/common/plat_gicv3.c \ <
plat/arm/common/arm_gicv3.c <
<
ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) <
FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c <
endif <
<
else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) <
<
# No GICv4 extension <
GIC_ENABLE_V4_EXTN := 0 <
$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) <
<
# Include GICv2 driver files <
include drivers/arm/gic/v2/gicv2.mk <
<
FVP_GIC_SOURCES := ${GICV2_SOURCES} \ <
plat/common/plat_gicv2.c \ <
plat/arm/common/arm_gicv2.c <
<
FVP_DT_PREFIX := fvp-base-gicv2-psci <
else <
$(error "Incorrect GIC driver chosen on FVP port") <
endif <
<
ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) <
FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c <
else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) <
FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ <
plat/arm/common/arm_ccn.c plat/arm/common/arm_ccn.c
else else
$(error "Incorrect CCN driver chosen on FVP port") | $(error "Incorrect CCN driver chosen on FVP_R port")
endif endif
FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ | PLAT_INCLUDES := -Iplat/arm/board/fvp_r/include
plat/arm/board/fvp/fvp_security.c \ <
plat/arm/common/arm_tzc400.c <
<
<
PLAT_INCLUDES := -Iplat/arm/board/fvp/include <
<
PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c | PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp_r/fvp_r_common.c
FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S | FVP_R_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S
<
ifeq (${ARCH}, aarch64) <
# select a different set of CPU files, depending on whether we compile for # select a different set of CPU files, depending on whether we compile for
# hardware assisted coherency cores or not # hardware assisted coherency cores or not
ifeq (${HW_ASSISTED_COHERENCY}, 0) ifeq (${HW_ASSISTED_COHERENCY}, 0)
# Cores used without DSU # Cores used without DSU
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S | # FVP_R_CPU_LIBS += lib/cpus/aarch64/fvp_r.S
lib/cpus/aarch64/cortex_a53.S <
lib/cpus/aarch64/cortex_a57.S <
lib/cpus/aarch64/cortex_a72.S <
lib/cpus/aarch64/cortex_a73.S <
else else
# Cores used with DSU only # Cores used with DSU only
ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) | # FVP_R_CPU_LIBS += lib/cpus/aarch64/fvp_r.S
# AArch64-only cores <
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S <
lib/cpus/aarch64/cortex_a76ae.S <
lib/cpus/aarch64/cortex_a77.S <
lib/cpus/aarch64/cortex_a78.S <
lib/cpus/aarch64/neoverse_n_common.S <
lib/cpus/aarch64/neoverse_n1.S <
lib/cpus/aarch64/neoverse_n2.S <
lib/cpus/aarch64/neoverse_e1.S <
lib/cpus/aarch64/neoverse_v1.S <
lib/cpus/aarch64/cortex_a78_ae.S <
lib/cpus/aarch64/cortex_a510.S <
lib/cpus/aarch64/cortex_a710.S \ <
lib/cpus/aarch64/cortex_makalu.S <
lib/cpus/aarch64/cortex_makalu_elp_arm <
lib/cpus/aarch64/cortex_a65.S <
lib/cpus/aarch64/cortex_a65ae.S <
lib/cpus/aarch64/cortex_a78c.S <
endif <
# AArch64/AArch32 cores <
FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ <
lib/cpus/aarch64/cortex_a75.S <
endif endif
else | BL1_SOURCES += drivers/arm/sp805/sp805.c
FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S <
endif <
<
BL1_SOURCES += drivers/arm/smmu/smmu_v3.c <
drivers/arm/sp805/sp805.c <
drivers/delay_timer/delay_timer.c drivers/delay_timer/delay_timer.c
drivers/io/io_semihosting.c drivers/io/io_semihosting.c
lib/semihosting/semihosting.c lib/semihosting/semihosting.c
lib/semihosting/${ARCH}/semihosting_call.S lib/semihosting/${ARCH}/semihosting_call.S
plat/arm/board/fvp/${ARCH}/fvp_helpers.S | plat/arm/board/fvp_r/fvp_r_bl1_arch_setup.c _r
plat/arm/board/fvp/fvp_bl1_setup.c | plat/arm/board/fvp_r/fvp_r_bl1_setup.c
plat/arm/board/fvp/fvp_err.c | plat/arm/board/fvp_r/fvp_r_context_mgmt.c
plat/arm/board/fvp/fvp_io_storage.c | plat/arm/board/fvp_r/fvp_r_bl1_main.c
${FVP_CPU_LIBS} | plat/arm/board/fvp_r/fvp_r_err.c _r
${FVP_INTERCONNECT_SOURCES} | plat/arm/board/fvp_r/fvp_r_io_storage.c
> plat/arm/board/fvp_r/fvp_r_bl1_entrypoint.S
> plat/arm/board/fvp_r/fvp_r_bl1_exceptions.S
> plat/arm/board/fvp_r/fvp_r_context.S
> plat/arm/board/fvp_r/fvp_r_debug.S
> plat/arm/board/fvp_r/fvp_r_helpers.S
> plat/arm/board/fvp_r/fvp_r_misc_helpers.S
> plat/arm/board/fvp_r/fvp_r_pauth_helpers.S
| plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> plat/arm/board/fvp_r/fvp_r
> ${FVP_R_CPU_LIBS}
> ${FVP_R_INTERCONNECT_SOURCES}
> ${FVP_R_INTERCONNECT_SOURC
ifeq (${USE_SP804_TIMER},1) ifeq (${USE_SP804_TIMER},1)
BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.ce
else else
BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c BL1_SOURCES += drivers/delay_timer/generic_delay_timer.ci
endif endif
<
BL2_SOURCES += drivers/arm/sp805/sp805.c <
drivers/io/io_semihosting.c <
lib/utils/mem_region.c <
lib/semihosting/semihosting.c <
lib/semihosting/${ARCH}/semihosting_call.S <
plat/arm/board/fvp/fvp_bl2_setup.c <
plat/arm/board/fvp/fvp_err.c <
plat/arm/board/fvp/fvp_io_storage.c <
plat/arm/common/arm_nor_psci_mem_protect.c <
${FVP_SECURITY_SOURCES} <
<
<
ifeq (${COT_DESC_IN_DTB},1) <
BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c <
endif <
<
ifeq (${BL2_AT_EL3},1) <
BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S <
plat/arm/board/fvp/fvp_bl2_el3_setup.c <
${FVP_CPU_LIBS} <
${FVP_INTERCONNECT_SOURCES} <
endif <
<
ifeq (${USE_SP804_TIMER},1) <
BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c <
endif <
<
BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c <
${FVP_SECURITY_SOURCES} <
<
ifeq (${USE_SP804_TIMER},1) <
BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c <
endif <
<
BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c <
drivers/arm/smmu/smmu_v3.c <
drivers/delay_timer/delay_timer.c <
drivers/cfi/v2m/v2m_flash.c <
lib/utils/mem_region.c <
plat/arm/board/fvp/fvp_bl31_setup.c <
plat/arm/board/fvp/fvp_console.c <
plat/arm/board/fvp/fvp_pm.c <
plat/arm/board/fvp/fvp_topology.c <
plat/arm/board/fvp/aarch64/fvp_helpers.S <
plat/arm/common/arm_nor_psci_mem_protect.c <
${FVP_CPU_LIBS} <
${FVP_GIC_SOURCES} <
${FVP_INTERCONNECT_SOURCES} <
${FVP_SECURITY_SOURCES} <
<
# Support for fconf in BL31 <
# Added separately from the above list for better readability <
ifeq ($(filter 1,${BL2_AT_EL3} ${RESET_TO_BL31}),) <
BL31_SOURCES += common/fdt_wrappers.c <
lib/fconf/fconf.c <
lib/fconf/fconf_dyn_cfg_getter.c <
plat/arm/board/fvp/fconf/fconf_hw_config_gette <
<
ifeq (${SEC_INT_DESC_IN_FCONF},1) <
BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c <
endif <
<
endif <
<
ifeq (${USE_SP804_TIMER},1) <
BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c <
else <
BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c <
endif <
<
# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) <
ifdef UNIX_MK <
FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts <
FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ <
${PLAT}_fw_config.dts \ <
${PLAT}_tb_fw_config.dts \ <
${PLAT}_soc_fw_config.dts \ <
${PLAT}_nt_fw_config.dts \ <
) <
<
FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb <
FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb <
FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb <
FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb <
<
ifeq (${SPD},tspd) <
FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config. <
FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb <
<
# Add the TOS_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_ <
endif <
<
ifeq (${SPD},spmd) <
<
ifeq ($(ARM_SPMC_MANIFEST_DTS),) <
ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest. <
endif <
<
FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} <
FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_S <
<
# Add the TOS_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_ <
endif <
<
# Add the FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG})) <
# Add the TB_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_ <
# Add the SOC_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_ <
# Add the NT_FW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_ <
<
FDT_SOURCES += ${FVP_HW_CONFIG_DTS} <
$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_ <
<
# Add the HW_CONFIG to FIP and specify the same to certtool <
$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG})) <
endif <
<
# Enable Activity Monitor Unit extensions by default # Enable Activity Monitor Unit extensions by default
ENABLE_AMU := 1 ENABLE_AMU := 1
# Enable dynamic mitigation support by default <
DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 <
<
# Enable reclaiming of BL31 initialisation code for secondary cores <
# stacks for FVP. However, don't enable reclaiming for clang. <
ifneq (${RESET_TO_BL31},1) <
ifeq ($(findstring clang,$(notdir $(CC))),) <
RECLAIM_INIT_CODE := 1 <
endif <
endif <
<
ifeq (${ENABLE_AMU},1) <
BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ <
lib/cpus/aarch64/cpuamu_helpers.S <
<
ifeq (${HW_ASSISTED_COHERENCY}, 1) <
BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ <
lib/cpus/aarch64/neoverse_n1_pubsub.c <
endif <
endif <
<
ifeq (${RAS_EXTENSION},1) <
BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c <
endif <
<
ifneq (${ENABLE_STACK_PROTECTOR},0) ifneq (${ENABLE_STACK_PROTECTOR},0)
PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c | PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp_r/fvp_r_stack_protector.c_r
endif endif
ifeq (${ARCH},aarch32) | NEED_BL32 := no
NEED_BL32 := yes <
endif <
<
# Enable the dynamic translation tables library. <
ifeq (${ARCH},aarch32) <
ifeq (${RESET_TO_SP_MIN},1) <
BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
else # AArch64 <
ifeq (${RESET_TO_BL31},1) <
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
ifeq (${SPD},trusty) <
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
endif <
<
ifeq (${ALLOW_RO_XLAT_TABLES}, 1) <
ifeq (${ARCH},aarch32) <
BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES <
else # AArch64 <
BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES <
ifeq (${SPD},tspd) <
BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES <
endif <
endif <
endif <
<
ifeq (${USE_DEBUGFS},1) <
BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC <
endif <
<
# Add support for platform supplied linker script for BL31 build <
$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) <
ifneq (${BL2_AT_EL3}, 0) ifneq (${BL2_AT_EL3}, 0)
override BL1_SOURCES = override BL1_SOURCES =
endif endif
include plat/arm/board/common/board_common.mk include plat/arm/board/common/board_common.mk
include plat/arm/common/arm_common.mk include plat/arm/common/arm_common.mk
ifeq (${TRUSTED_BOARD_BOOT}, 1) ifeq (${TRUSTED_BOARD_BOOT}, 1)
BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c | BL1_SOURCES += plat/arm/board/fvp_r/fvp_r_trusted_boot.c_r
BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c <
<
ifeq (${MEASURED_BOOT},1) <
BL2_SOURCES += plat/arm/board/fvp/fvp_measured_boot.c <
endif <
# FVP being a development platform, enable capability to disable Authenticatio # FVP being a development platform, enable capability to disable Authenticatio
# dynamically if TRUSTED_BOARD_BOOT is set. # dynamically if TRUSTED_BOARD_BOOT is set.
DYN_DISABLE_AUTH := 1 DYN_DISABLE_AUTH := 1
endif endifDYN_DISABLE_AUTH := 1
endif endif
```