TF-M has been under active development since it was launched in Q1'18. It is being designed to include 1. //**Secure boot**// ensuring integrity of runtime images and responsible for firmware upgrade. 2. Runtime firmware consisting of //** TF-M Core**// responsible for secure isolation, execution and communication aspects. and a set of Secure Services providing services to the Non-Secure and Secure Applications. The secures services currently supported are //**Secure Storage, Cryptography, Firmware Update, Audit Logs, Attestation and Platform Services**// If you are interested in collaborating on any of the roadmap features or other features, please mail TF-M [[ https://lists.trustedfirmware.org/mailman/listinfo/tf-m | mailing list ]] Supported Features - PSA Firmware Framework v1.0, 1.1 Extension and Library Mode. - PSA Level1, 2 and 3 Isolation. Level3 Isolation enabled only for MuscaB1, AN521 and STM32L5 - Secure Boot (mcuboot upstream) including generic fault injection mitigations - PSA Protected Storage and Internal Trusted Storage v1.0 - Audit Logs - PSA Crypto (uses Mbed TLS v3.1) - PSA Initial Attestation Service v1.0 - PSA Firmware Update - Secure Partition Interrupt Handling, Pre-emption of SPE execution - Platform Reset Service - Dual CPU - Open Continuous Integration (CI) System - Boot and Runtime Crypto Hardware Integration - Profile Small, Medium, Large - Fault Injection Handling library to mitigate against physical attacks - Threat Model - Arm v8.1-M Privileged Execute Never (PXN) attribute and Thread reentrancy disabled (TRD) - FPU Support - Different keys for different Protected Storage assets - CC-312 PSA Cryptoprocessor Driver Interface - Non-Secure Client ID improvements - PSA ADAC Specification Implementation - PSA SPs support SFN in ​Profile Small - PSA Crypto API ​1.0 Compliance ​(upgrade to Mbed TLS3.1) CQ2'22 - TF-Mv1.6 Release - Profile Small/SFN mode - Memory and Performance Optimizations - Investigate PSA Crypto service and HAL memory optimization - Design document restructure - FPU and MVE support enable use in Non-Secure and Secure Future - Arm v8.1-M MVE - Further implementation - Multiple Secure Context PoC - PSA FWU Service Enhancements - PSA ADAC Spec - Further Implementation - Arm v8.1-M Unprevileged Debug - Secure Partition HAL Update - Scheduler - Multiple Secure Context Implementation - Arm v8.1-M Architecture Enablement Phase2 - [Secure Storage] Extended PSA APIs, Key Diversification Enhancements - [Platform] NV Count, Timer - [Platform] Secure Time - [Audit Logs] Secure Storage, Policy Manager - PSA FF Lifecycle API - MISRA testing - Fuzz Testing

TF-M has been under active development since it was launched in Q1'18. It is being designed to include 1. //**Secure boot**// ensuring integrity of runtime images and responsible for firmware upgrade. 2. Runtime firmware consisting of //** TF-M Core**// responsible for secure isolation, execution and communication aspects. and a set of Secure Services providing services to the Non-Secure and Secure Applications. The secures services currently supported are //**Secure Storage, Cryptography, Firmware Update, Attestation and Platform Services**// If you are interested in collaborating on any of the roadmap features or other features, please mail TF-M [[ https://lists.trustedfirmware.org/mailman3/lists/tf-m.lists.trustedfirmware.org/ | mailing list ]] Supported Features - PSA Firmware Framework v1.0, 1.1 Extension including IPC and SFN modes. - PSA Level1, 2 and 3 Isolation. - Secure Boot (mcuboot upstream) including generic fault injection mitigations - PSA Protected Storage, Internal Trusted Storage v1.0 and Encrypted ITS - PSA Cryptov1.0 (uses Mbed TLS v3.4.0) - PSA Initial Attestation Service v1.0 - PSA Firmware Update v1.0 - PSA ADAC Specification Implementation - Base Config - kconfig based configuration - Profile Small, Medium, ARoT-less Medium, Large - Secure Partition Interrupt Handling, Pre-emption of SPE execution - Platform Reset Service - Dual CPU - Open Continuous Integration (CI) System - Boot and Runtime Crypto Hardware Integration - Fault Injection Handling library to mitigate against physical attacks - Threat Model - Arm v8.1-M Privileged Execute Never (PXN) attribute and Thread reentrancy disabled (TRD) - FPU, MVE Support - CC-312 PSA Cryptoprocessor Driver Interface CQ4'23 - TF-M v1.9 release - Mbed TLS 3.5.0, mcuboot 2.0.0 Integration - Design, prototype: Supporting multiple clients i.e. TF-M supporting multiple on core and off core clients on Hetrogeneous (e.g. Cortex-A + Cortex-M platforms) - Demonstrating TLS in Non-Secure using PSA Crypto APIs in TF-M - Build System Enhancements - Separate Secure, Non-Secure Builds - Mailbox interrupt handling Future: - Long Term Stable (LTS) support - Implement support for multiple clients - Remote Test Infrastructure - MISRA testing - TF-M Performance - Further Benchmarking and Optimization - Scheduler - Multiple Secure Context Implementation - Arm v8.1-M Architecture Enablement - PAC/BTI - PSA FWU Service Enhancements - PSA ADAC Spec - Enhancements and Testing - Arm v8.1-M Unprevileged Debug - [Secure Storage] Extended PSA APIs, Key Diversification Enhancements - [Audit Logs] Secure Storage, Policy Manager - PSA FF Lifecycle API - Fuzz Testing

TF-M has been under active development since it was launched in Q1'18. It is being designed to include 1. //**Secure boot**// ensuring integrity of runtime images and responsible for firmware upgrade. 2. Runtime firmware consisting of //** TF-M Core**// responsible for secure isolation, execution and communication aspects. and a set of Secure Services providing services to the Non-Secure and Secure Applications. The secures services currently supported are //**Secure Storage, Cryptography, Firmware Update, Audit Logs, Attestation and Platform Services**// If you are interested in collaborating on any of the roadmap features or other features, please mail TF-M [[ https://lists.trustedfirmware.org/mailman/listinfo/tf-m3/lists/tf-m.lists.trustedfirmware.org/ | mailing list ]] Supported Features - PSA Firmware Framework v1.0, 1.1 Extension and Library Modeincluding IPC and SFN modes. - PSA Level1, 2 and 3 Isolation. Level3 Isolation enabled only for MuscaB1, AN521 and STM32L5 - Secure Boot (mcuboot upstream) including generic fault injection mitigations - PSA Protected Storage and, Internal Trusted Storage v1.0e v1.0 and Encrypted ITS - PSA Cryptov1.0 (uses Mbed TLS v3.4.0) - Audit Logs- PSA Initial Attestation Service v1.0 - PSA Crypto (uses Mbed TLS v3.1)Firmware Update v1.0 - PSA Initial AttestADAC Specification Service v1.0Implementation - PSA Firmware Update- Base Config - kconfig based configuration - Profile Small, Medium, ARoT-less Medium, Large - Secure Partition Interrupt Handling, Pre-emption of SPE execution - Platform Reset Service - Dual CPU - Open Continuous Integration (CI) System - Boot and Runtime Crypto Hardware Integration - Profile Small, Medium, Large - Fault Injection Handling library to mitigate against physical attacks - Threat Model - Arm v8.1-M Privileged Execute Never (PXN) attribute and Thread reentrancy disabled (TRD) - FPU, MVE Support - Different keys for different Protected Storage assets - CC-312 PSA Cryptoprocessor Driver Interface CQ4'23 - Non-Secure Client ID improvements- TF-M v1.9 release - Mbed TLS 3.5.0, mcuboot 2.0.0 Integration - PSA ADAC Specification Implementation - PSA SPs s- Design, prototype: Support SFN in ​Profile Smalling multiple clients - PSA Crypto API ​1.0 Compliance ​(upgrade to Mbed TLS3.1) CQ2'22 i.e. TF-M supporting multiple on core and off core clients on Hetrogeneous (e.g. Cortex-A + Cortex-M platforms) - TF-Mv1.6 Release - Profile Small/SFN mode - Memory and Performance Optimizations- Demonstrating TLS in Non-Secure using PSA Crypto APIs in TF-M - Investigate PSA Crypto service and HAL memory optimization- Build System Enhancements - Separate Secure, Non-Secure Builds - Design document restructure - FPU and MVE support enable use in Non-Secure and Secure- Mailbox interrupt handling Future: - Arm v8.1-M MVE - Further i- Long Term Stable (LTS) support - Implementationt support for multiple clients - Multiple Secure Context PoCRemote Test Infrastructure - MISRA testing - TF-M Performance - Further Benchmarking and Optimization - Scheduler - Multiple Secure Context Implementation - Arm v8.1-M Architecture Enablement - PAC/BTI - PSA FWU Service Enhancements - PSA ADAC Spec - Further ImplementationEnhancements and Testing - Arm v8.1-M Unprevileged Debug - Secure Partition HAL Update - Scheduler - Multiple Secure Context Implementation - Arm v8.1-M Architecture Enablement Phase2 - [Secure Storage] Extended PSA APIs, Key Diversification Enhancements - [Platform] NV Count, Timer - [Platform] Secure Time - [Audit Logs] Secure Storage, Policy Manager - PSA FF Lifecycle API - MISRA testing - Fuzz Testing